Blind Estimation Of Timing Errors In Interleaved Ad Converters

Parallel AD converter structures is one way to increase the sampling rate. Instead of increasing the sample rate in one AD converter, several AD converters with lower sampling rate can be used instead. A problem in these structures is that the time between samples is usually not equal because there are errors in the delays between the AD converters. We will here present a method to estimate the timing offset errors. The estimation algorithm works without any special calibration signal, instead the normal input signal is used. The only assumption that we need on the input signal is that most of the energy is concentrated to a low pass band, below about 1/3 of the Nyquist frequency. Simulations of the time interleaved AD converter show that the method estimates the errors with high accuracy

Verification of a blind mismatch error equalization method for randomly interleaved ADCs using a 2.5V/12b/30MSs PSAADC

A 2.5V/12b/30MS/s randomly time interleaved ADC system has been implemented. Using this circuit an earlier presented [6] blind gain error equalization method has been verified. It is verified that the gain in each ADC unit can be found and equalized by using the blind estimation method, since the randomization assures that there is no correlation between the ADC unit used and the input data. It has been found that the blind gain error equalization attenuates the energy of the gain distortion tones by up to 72 dB. The SNDR of the random time interleaved ADC system was improved by 10.1 [dB] after the amplitude offset and gain equalization was performed. The measured system SNDR is only 2.1 [dB] worse than the measured SNDR of a single ADC uni